74LS138 is a member from '74xx'family of TTL logic gates, also called a 3 to 8 line decoder. The main function of this IC is to decode otherwise demultiplex the applications. It uses advanced technology like silicon (Si) gate TTL technology. 74HCT138 is primarily designed to convert a binary code input into an output among several lines. It decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1, E2 and E3). Every output will be high unless E1 and E2 are LOW and E3 is high.

Figure 1: 74LS138 Pin Configuration
【Pin 1】A0: Address input terminal
【Pin 2】A1: Address input terminal
【Pin 3】A2: Address input terminal
【Pin 4】E3: Strobe terminal (active low level)
【Pin 5】E2: Strobe terminal (active low level)
【Pin 6】E1: Strobe terminal
【Pin 7】Y7: Output terminal (active low level)
【Pin 8】GND: Ground
【Pin 9】Y6: Output terminal (active low level)
【Pin 10】Y5: Output terminal (active low level)
【Pin 11】Y4: Output terminal (active low level)
【Pin 12】Y3: Output terminal (active low level)
【Pin 13】Y2: Output terminal (active low level)
【Pin 14】Y1: Output terminal (active low level)
【Pin 15】Y0: Output terminal (active low level)
【Pin 16】VCC: Power positive

Figure 2: 74LS138 Package Information
74LS138 is a 3-line to 8-line decoder. It has two line structure types: 54/74S138 and 54/74LS138. Its working principle is as follows:
① When E1 is high level, and E2 and E3 are low level, the binary of the address terminals (A0, A1, A2) can be decoded at low level at the output terminals corresponding to Y0 to Y7. That is, the output is the negation of Y0 to Y7, for example: when A2=A1=A0=110, the Y6 output terminal outputs a low level signal.
② E1, E2 and E3 can be cascaded and expanded into a 24-line decoder. Further more, if an external inverter is connected, it can also be made a 32-line decoder.
③ If one of the strobe terminals is used as a data input terminal, 74LS138 can also be used as a data distributor.
④ 74LS138 can be used in the decoding circuit of 8086 to expand the memory.
(1) Function table of 3-line to 8-line decoder 74LS138
|
Input |
Output |
||||||||||||
|
E1 |
E2 |
E3 |
A0 |
A1 |
A2 |
Y0 |
Y1 |
Y2 |
Y3 |
Y4 |
Y5 |
Y6 |
Y7 |
|
H |
X |
X |
X |
X |
X |
H |
H |
H |
H |
H |
H |
H |
H |
|
X |
H |
X |
X |
X |
X |
H |
H |
H |
H |
H |
H |
H |
H |
|
X |
X |
L |
X |
X |
X |
H |
H |
H |
H |
H |
H |
H |
H |
|
L |
L |
H |
L |
L |
L |
L |
H |
H |
H |
H |
H |
H |
H |
|
L |
L |
H |
H |
L |
L |
H |
L |
H |
H |
H |
H |
H |
H |
|
L |
L |
H |
L |
H |
L |
H |
H |
L |
H |
H |
H |
H |
H |
|
L |
L |
H |
H |
H |
L |
H |
H |
H |
L |
H |
H |
H |
H |
|
L |
L |
H |
L |
L |
H |
H |
H |
H |
H |
L |
H |
H |
H |
|
L |
L |
H |
H |
L |
H |
H |
H |
H |
H |
H |
L |
H |
H |
|
L |
L |
H |
L |
H |
H |
H |
H |
H |
H |
H |
H |
L |
H |
|
L |
L |
H |
H |
H |
H |
H |
H |
H |
H |
H |
H |
H |
L |
(2) 74LS138 Logic Diagram

Figure 3: 74HC138 Decoder Logic Diagram
Whether from the logic diagram or the function table, we can see that the eight output pins of the 74LS138 are all high level 1 at any time - the chip is not working, or only one is low level 0, and the remaining seven output pins are all high level.
1. If both output pins are 0 at the same time, it means that the chip has been damaged.
When the output of the additional control gate is high level (E=1), it can be written by the logic diagram.

It can be seen from the above formula that it is the decoding output of all minterms of these three variables at the same time, so this kind of decoder is also called a minterm decoder.
The 74LS138 has three additional control terminals and when the output is high (E=1), the decoder is in working condition. Otherwise, the decoder is disabled and all outputs are blocked at high, as shown in the function table. These three control terminals are also called "chip select" input terminals. Using the function of chip select, multiple articles can be connected to expand the function of the decoder.
(1) Try two 3-to-8 line decoder 74LS138 to form a 4-line to 16-line decoder.

Figure 4: 4-to-16 Line Demultiplexer
(2) Simple application - LED Lights

Figure 5: 74LS138 Decoder IC Controls LED Lights
(3) Realize digital tube chip selection

Figure 6: 74LS138 Decoder IC Controls Digital Tube Chip Selection
In short, 74HC138 is a decoder. During encoding, each binary code is given a specific meaning, that is, it represents a certain signal or object. The process of "translating" the specific meaning of the code state is called decoding, and the circuit that implements the decoding operation is called a decoder. The most common use of 74HC138 on microcontrollers is IO expansion, and it is usually used with 74HC573 latches. For example, the combined use of 74HC138 decoder and 74HC573 latches can achieve 3+8 IOs to control the output of 32 IO ports.
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