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LD3985M33R Voltage Regulator: Specifications, Pinout, Diagrams

LD3985M33R Voltage Regulator: Specifications, Pinout, Diagrams

April 01 , 2024 Posted by KUKE 0

LD3985M33R Product Overview

The LD3985M33R provides up to 150 mA, from 2.5 V to 6 V input voltage. The ultra low drop voltage, low quiescent current and low noise make it suitable for low power applications and in battery-powered systems. Regulator ground current increases slightly in dropout only, prolonging the battery life. Power supply rejection is better than 60 dB at low frequencies and rolls off at 10 kHz. High power supply rejection is maintained down to low input voltage levels common to battery operated circuits. Shutdown logic control function is available, this means that when the device is used as local regulator, it is possible to put a part of the board in standby, decreasing the total power consumption. The LD3985 is designed to work with low ESR ceramic capacitors. Typical applications are in mobile phones and similar battery-powered wireless systems.

LD3985M33R STMicroelectronics

Features

• Input voltage from 2.5 to 6 V

• Stable with low ESR ceramic capacitors

• Ultra low-dropout voltage (60 mV typ. at 150 mA load, 0.4 mV typ. at1 mA load)

• Very low quiescent current (85 μA typ. at no load, 170 μA typ. at 150 mA load; max.1.5 μA in OFF mode)

• Guaranteed output current up to 150 mA

• Wide range of output voltages: 1.22 V; 1.8 V; 2.5 V; 2.7 V; 2.8 V;2.9 V; 3.3 V; 4.7 V

• Fast turn-on time: typ. 200 μs [CO = 1 μF, CBYP = 10 nF and IO = 1 mA]

• Logic-controlled electronic shutdown

• Internal current and thermal limit

• Output low noise voltage 30 μVRMS over 10 Hz to 100 kHz

• SVR of 60 dB at 1 kHz, 50 dB at 10 kHz

• Temperature range: -40 °C to 125 °C

Datasheet Download

Schematic Diagram

LD3985M33R Schematic Diagram

Figure 1.

Pin Configuration and Function

LD3985M33R Pin Configuration

Figure 2: LD3985M33R Pins

Pin	Symbol	Function
1	VI	Input voltage of the LDO
2	GND	Common ground
3	VINH	Inhibit input voltage: ON mode when VINH ≥ 1.2 V, OFF mode when VINH ≤ 0.4 V (Do not leave it floating, not internally pulled down/up)
4	BYPASS	Bypass pin: an external capacitor (usually 10 nF) has to be connected to minimize noise voltage
5	VO	Output voltage of the LDO