Ceva has launched its next-generation NeuPro NPU portfolio and announced its entry into the AI infrastructure sector

Covering a wide range of physical AI applications—from always-on sensors to AI infrastructure—with a common architecture and unified software stack; delivering up to twice the AI throughput per square millimetre and a 50 per cent improvement in energy efficiency for new multimodal, generative and agentic AI workloads

Ceva (Nasdaq: CEVA), a licensor of intelligent edge chips and software IP, today announced its next-generation NeuPro NPU product family, which offers more comprehensive capabilities than the first generation, with AI throughput per square millimetre increased by up to twofold and energy efficiency improved by 50 per cent.

This new product portfolio is based on a common architecture and a unified software stack, designed to support increasingly demanding multimodal, generative and agent-based AI workloads, spanning a range of physical AI applications from always-on sensors to advanced edge systems. The architecture also marks Ceva’s entry into the AI infrastructure sector, targeting the cloud and data centres, and encompassing intelligent storage, connectivity and data processing chips, as well as customised AI inference processors.

Physical AI systems are increasingly reliant on multiple AI models and intelligent agents working in concert; in this context, perception and real-time responses occur close to the sensors, whilst more complex inference and task orchestration are distributed across various devices, edge systems and the cloud. This transition towards hybrid AI is accelerating; however, regardless of where inference takes place, the same challenge persists: the power consumption and performance overheads associated with the computation itself, as well as the transmission of data between computing units and other components. At the sensor edge, this overhead manifests as power consumption in the microwatt range and footprint in the square millimetre range; in data centres, it manifests as power consumption in the megawatt range and memory bandwidth consumption. Although this constraint takes different forms across various scenarios, the core requirement remains consistent: neural processing capabilities optimised for specific workloads, supported by a common architecture and software environment.

The new-generation NeuPro product family addresses both of these requirements by offering a range of computing engines in various sizes for different locations within the system, whilst utilising a single development approach common to all these engines. The entire product family utilises a unified software development kit (SDK), enabling semiconductor designers to match the appropriate computing engine to each part of the system, or to integrate multiple engines onto a single system-on-chip (SoC), whilst ensuring that existing software investments are fully utilised.

Yaron Galitzky, Executive Vice President of Ceva’s AI Division, stated: “ ‘We have worked closely with more than 15 licensed customers of the first-generation NeuPro and recognise that the key to successful AI products lies in striking the right balance between compute, memory, bandwidth, power consumption and cost for specific application scenarios. Our team has fully incorporated these insights into the design of this new-generation product, aiming to enable customers to deploy today’s computationally intensive models with greater ease whilst preparing for future workloads.’”

Built to meet the inference requirements of the next generation

Peak computing power alone is no longer sufficient to define the performance of an AI system. Semiconductor developers must also achieve optimal inference throughput whilst operating within stringent power, footprint and memory constraints, whilst ensuring their architectures can support an ever-evolving range of models throughout the product lifecycle. The next-generation NeuPro architecture has been designed specifically to address these two key challenges.

This architecture introduces a range of capabilities to support workloads ranging from perception and classification to Transformer-based multimodal, generative and agent-based AI, including physical AI applications:

• Compared with the first-generation product, AI throughput per square millimetre has increased by up to twofold, whilst energy efficiency has improved by 50 per cent.
• It offers advanced AI numerical and mixed-precision capabilities (including FP4 and FP8), which improve inference efficiency whilst reducing memory and data transfer requirements.
• With higher memory bandwidth and advanced memory management mechanisms (including dynamic shapes and paged KV caches), it is capable of handling more demanding scenarios and memory-intensive Transformer workloads.
• By utilising optimised Tensor reshaping techniques to improve the utilisation rate of multiply-accumulate (MAC) operations, computational resources are utilised more effectively to enhance inference performance.
• It supports a wide range of cutting-edge network architectures, including Mixture-of-Experts and Linear Attention, and offers a high degree of architectural flexibility, enabling it to adapt to all kinds of new models that may emerge in the future.
• It supports pre-quantised models, allowing customers to deploy published model checkpoints directly without the need for additional quantisation and calibration steps.
• By employing advanced compression, quantisation and pruning techniques, it reduces computational load and data transmission, thereby improving power efficiency per watt and effective performance per unit area.